This project involved the design of an image compression/decompression board. The board compressed or decompressed monochrome digital images using a video compression/expansion processor (VCEP) chip. Images were received from the Versa Module Europa (VME) bus and transmitted to parallel transfer disk drives or back to the VME bus for loop-back testing. The board utilized Altera EP1810 programmable logic devices (PLDs) for most interrupts and implemented VME Bus request/grant daisy chains. The completed board was of a 9U by 400 mm form factor and fully VME-compliant.

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